EDN

Platform takes interconnect from chip to board

San Jose, Calif. — Cadence Design Systems Inc. will release a platform this week that can model the high-speed interconnect of an entire system, from ICs through packages to pc boards. Allegro takes ...
EDN

Cadence platform models chip-to-board interconnect

SAN JOSE, Calif. — Cadence Design Systems Inc. will release a platform this week that can model the high-speed interconnect of an entire system, from ICs through packages to pc boards. Allegro takes ...
TechRepublic

Electromigration Modeling and Full-Chip Reliability Analysis for BEOL Interconnect in TSV-Based 3D ICs

Electro-Migration (EM) is a critical problem for interconnect reliability of modern Integrated Circuits (ICs), especially as the feature size becomes smaller. In Three-Dimensional (3D) IC technology, ...
Design-Reuse

IDT to Buy Optical Interconnect IC Vendor GigPeak

SAN JOSE, CALIFORNIA-- Feb. 13, 2017-Integrated Device Technology, Inc. (IDT®) (NASDAQ:IDTI) and GigPeak, Inc. (NYSE MKT:GIG) today announced that they have signed a definitive agreement for IDT to ...
Electronic Design

IC Packages Feel The Squeeze

Packing more IC functionality into smaller form factors stacks the deck against IC makers and foreshadows difficult interconnect challenges. How much can one package take? As consumer electronics ...
Design-Reuse

Allwinner Technology Licenses Arteris Interconnect Fabric IP for Tablet and Mobile Device Applications

SUNNYVALE, California — August 13, 2013 — Arteris Inc., the inventor and only supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that Allwinner ...